1. Field of the Invention
The present invention relates to the protection of integrated circuits against attacks by error injection, and particularly to the protection of integrated circuits present in smart cards.
The present invention relates more particularly to a method for securing the writing and the reading of a memory.
It applies in particular, but not exclusively, to memories that are both read- and write-accessible, whether volatile like RAM memories, or non-volatile like EEPROM and FLASH memories.
2. Description of the Related Art
In recent years, techniques of hacking secured microprocessor integrated circuits have developed considerably. The most advanced hacking methods currently involve injecting errors at determined points of an integrated circuit during the execution of so-called sensitive operations, such as authentication operations or operations of executing a cryptography algorithm for example. Such attacks by error injection, also referred to as attacks by fault injection, enable, in combination with mathematical models, the structure of a hard-wired logic cryptography algorithm and/or the secret keys it uses to be deduced. The error injection can be done in various ways, by introducing glitches into the supply voltage of the integrated circuit, by introducing glitches into the clock signal of the integrated circuit, or by exposing the integrated circuit to radiations or to a laser beam, etc. RAM memories are particularly vulnerable to glitches.
U.S. Pat. No. 6,901,552 discloses a method of accessing a RAM memory wherein a parity or CRC (Cyclic Redundancy Check) control word is computed and memorized for each word or group of four words in the memory. When the memory is read, the control word is computed and compared with the memorized control word for the read word. If a difference is detected, an error signal is emitted. When the memory is written, the control word is checked. Then a new control word is computed and memorized for the word to be written, and the latter is stored in the memory.
The control word checking and the computation of a new control word appear to increase in an important manner the access times to the memory, especially the write access time. These access times become excessive if it is necessary to implement cumulative signature calculations which are more complex than parity or CRC calculations.